Performance Analysis of Various Complementary Metaloxide Semiconductor Logics for High Speed Very Large Scale Integration Circuits

Abstract

The demand for VLSI low voltage high-performance low power systems are increasing significantly. Today's device
applications necessitate a system that consumes little power and conserves performance. Recent battery-powered lowvoltage
devices optimize power and high-speed constraints. Aside from that, there is a design constraint with burst-mode
type integrated circuits for small devices to scale down. Low voltage low power static CMOS logic integrated circuits
operate at a slower rate and cannot be used in high performance circuits. As a result, dynamic CMOS logic is used in
integrated circuits because it requires fewer transistors, has lower parasitic capacitance, is faster, and enables pipelined
system architecture with glitch-free circuits. It has, however, increased power dissipation. Both types of CMOS circuits with
low power dissipation overcome their own shortcomings.
This paper discusses dynamic CMOS logic circuits and their structures. Various logics are also discussed and on the basis
of the results obtained, logic which is best suited for designing CMOS logic circuit will be found out. The logic on the basis
of structure layout and design which gives best results for high-speed VLSI circuits, is found out.